Embodiments of the present invention relate to a concept for extracting a signal being exchanged between a device under test and an automatic test equipment. Some embodiments of the present invention relate to a method to probe the transmitted and received signals between a device under test and an automatic test equipment pin electronics channel.
High-speed memory applications like DDR4 (DDR4=double data rate type four) can be characterized and tested using an automatic test equipment (ATE) 10. In an initial characterization step, it can be of significant help for the test engineer to measure the signals being exchanged between the automatic test equipment 10 and the device under test (DUT) 20 using an external instrument 30 as shown in FIG. 1a. The challenge of this setup is to make sure that at the probing point 40 the signal integrity is good enough to measure the signals being exchanged between the automatic test equipment 10 and the device under test 20 with a high fidelity. At the same time, it is also important to guarantee that the probing setup does have a minimal impact on the signal integrity between the device under test 20 and automatic test equipment 10 and in this way degrade the signals form the automatic test equipment 10 or the device under test 20. Nevertheless, it is very difficult to create a probing point 40 that does have a minimal impact on the signal integrity between the device under test 20 and the automatic test equipment 10 pin electronics.
Previous solutions include probing the back of the non-backdrilled vias to the device under test 20 ball grid array (BGA) on the automatic test equipment test fixture printed circuit board (PCB) 50 as shown in FIG. 1b. This approach presents significant problems for high-speed applications because the via stub 60 has a significant impact on the signal integrity and the probing circuit cannot be removed.
In addition, probe traces and circuitry can be implemented on the device under test 20 test fixture PCB, but they cannot be removed easily, meaning that they will have an impact on the device under test 20 to automatic test equipment 10 performance. They also necessitate careful design to provide a good signal integrity for high-speed applications.